LNAMIXREGLOADEN=disable_resistor, IFADCENLDOSHUNT=shunt_ldo_disable, IFADCCAPRESET=cap_reset_disable, SYCHPQNC3EN=qnc_2, SYPFDCHPLPEN=disable, LNAMIXENRFPKD=disable, IFADCENLDOSERIES=series_ldo_disable, SYPFDFPWEN=disable, SYCHPBIASTRIMBUF=i_tail_10u, PGAENLDO=disable_ldo, LNAMIXLDOLOWCUR=regular_mode, SYMMDMODE=rx_w_swctrl
| IFADCCAPRESET | IFADCCAPRESET 0 (cap_reset_disable): undefined 1 (cap_reset_enable): undefined |
| IFADCENLDOSERIES | IFADCENLDOSERIES 0 (series_ldo_disable): undefined 1 (series_ldo_enable): undefined |
| IFADCENLDOSHUNT | IFADCENLDOSHUNT 0 (shunt_ldo_disable): undefined 1 (shunt_ldo_enable): undefined |
| LNAMIXENRFPKD | LNAMIXENRFPKD 0 (disable): undefined 1 (enable): undefined |
| LNAMIXLDOLOWCUR | LNAMIXLDOLOWCUR 0 (regular_mode): undefined 1 (low_current_mode): undefined |
| LNAMIXREGLOADEN | LNAMIXREGLOADEN 0 (disable_resistor): undefined 1 (enable_resistor): undefined |
| PGAENLDO | PGAENLDO 0 (disable_ldo): undefined 1 (enable_ldo): undefined |
| SYCHPBIASTRIMBUF | SYCHPBIASTRIMBUF 0 (i_tail_10u): undefined 1 (i_tail_20u): undefined |
| SYCHPQNC3EN | SYCHPQNC3EN 0 (qnc_2): undefined 1 (qnc_3): undefined |
| SYMMDMODE | SYMMDMODE 0 (rx_w_swctrl): undefined 1 (rx_wo_swctrl): undefined 2 (qnc_dsm2): undefined 3 (qnc_dsm3): undefined 4 (rxlp_wo_swctrl): undefined 5 (notuse_5): undefined 6 (notuse_6): undefined 7 (notuse_7): undefined |
| SYPFDCHPLPEN | SYPFDCHPLPEN 0 (disable): undefined 1 (enable): undefined |
| SYPFDFPWEN | SYPFDFPWEN 0 (disable): undefined 1 (enable): undefined |